1/8

April 2001

s

s

LOW POWER DISSIPATION:

s

COMPATIBLE WITH TTL OUTPUTS

s

50

Ω TRANSMISSION LINE DRIVING

CAPABILITY

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

BALANCED PROPAGATION DELAYS:

s

OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 86

s

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74ACT86 is an advanced high-speed CMOS

QUAD EXCLUSIVE OR GATE fabricated with

sub-micron silicon gate and double-layer metal

The internal circuit is composed of 3 stages in-

cluding buffer output, which enables high noise

immunity and stabe output.

The device is designed to interface directly High

Speed CMOS systems with TTL, NMOS and

CMOS output voltage levels.

All inputs and outputs are equipped with protec-

tion circuits against static discharge, giving them

2KV ESD immunity and transient excess voltage.

74ACT86

QUAD EXCLUSIVE OR GATE

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE

TUBE

T & R

DIP

74ACT86B

SOP

74ACT86M

74ACT86MTR

TSSOP

74ACT86TTR

TSSOP

DIP

SOP