M74LCX646

2/16

(enable G high), "A" data may be stored in one

register and/or "B" data may be stored in the other

register. When an output function is disabled, the

input function is still enabled and may be used to

store and transmit data. Only one of the two

buses, A or B, may be driven at a time. It has

same speed performance at 3.3V than 5V

AC/ACT family, combined with a lower power

consumption.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

Figure 2: Input And Output Equivalent Circuit

Table 2: Pin Description

PIN N°

SYMBOL

NAME AND FUNCTION

1

CLOCK AB (CAB)

A to B Clock Input (LOW to HIGH,

Edge-Triggered)

2

SELECT AB (SAB)

Select A to B Source Input

3

DIR

Direction Control Input

4, 5, 6, 7, 8, 9, 10, 11

A1 to A8

A Data Inputs/Outputs

20, 19, 18, 17, 16, 15, 14, 13

B1 to B8

B Data Inputs/Outputs

21

G

Output Enable Input (Active LOW)

22

SELECT BA (SBA)

Select B to A Source Input

23

CLOCK BA (CBA)

B to A Clock Input (LOW to HIGH,

Edge Triggered)

12

GND

Ground (0V)

24

Positive Supply Voltage