STFPC320 datasheet(28/78 Pages) STMICROELECTRONICS

28 / 78 page

Real-time clock (RTC) operation

STFPC320

28/78

6.7

Calibrating the clock

The STFPC320 is driven by a quartz controlled oscillator with a nominal frequency of

32.768 kHz. The accuracy of the RTC depends on the frequency of the quartz crystal that is

used as the time-base for the RTC. The accuracy of the clock is dependent upon the

accuracy of the crystal, and the match between the capacitive load of the oscillator circuit

and the capacitive load for which the crystal was trimmed. The STFPC320 crystal is

designed for use with a 6 pF crystal load capacitance. When the calibration circuit is

properly employed, accuracy improves to better than ±2 ppm at 25 deg C.

The oscillation rate of crystals changes with temperature. Therefore, the STFPC320 design

employs periodic counter correction. The calibration circuit adds or subtracts counts from

the oscillator divider circuit at the divide by 256 stage. The number of times pulses which are

blanked (subtracted, negative calibration) or split (added, positive calibration) depends upon

the value loaded into the five calibration bits found in the calibration register. Adding counts

speeds the clock up, subtracting counts slows the clock down.

The calibration bits occupy the five lower order bits (D4-D0) in the calibration register (08h).

These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is a

sign bit; ‘1’ indicates positive calibration and ‘0’ indicates negative calibration. Calibration

occurs within a 64-minute cycle. The first 62 minutes in the cycle may, once per minute,

have one second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary

‘1’ is loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified;

if a binary 6 is loaded, the first 12 will be affected, and so on.

Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator

cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or -2.034 PPM of

adjustment per calibration step in the calibration register.

Assuming that the oscillator is running at exactly 32.768 KHz, each of the 31 increments in

the calibration byte would represent +10.7 or -5.35 seconds per day which corresponds to a

total range of +5.5 or -2.75 minutes per month.

Two methods are available for ascertaining how much calibration a given STFPC320 may

require:

●

The first involves setting the clock, letting it run for a month and comparing it to a known

accurate reference and recording deviation over a fixed period of time. Calibration

values, including the number of seconds lost or gained in a given period allows the

designer to give the end user the ability to calibrate the clock as the environment

requires, even if the final product is packaged in a non-user serviceable enclosure. The

designer could provide a simple utility that accesses the calibration byte.

●

The second approach is better suited to a manufacturing environment, and involves the

use of IRQ_N/SQW pin. This pin will toggle at 512Hz when RS3 = ‘0’, RS2 = ‘1’, RS1 =

‘1’, RS0 = ‘0’, SQWE = ‘1’ and ST = ‘0’. In normal mode, it is always advised to keep the

SQWE to a ‘0’.

Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift at

the test temperature. For example, a reading of 512.010124 Hz would indicate a +20ppm

oscillator frequency error, requiring a -10 (XX001010) to be loaded into the Calibration Byte

for correction. Note that setting or changing the calibration byte does not affect the

frequency test or square wave output frequency.

STFPC320 数据表(PDF) 28 Page - STMicroelectronics

STFPC320 数据表(HTML) 28 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

数据表下载