2 Equivalent circuit of inputs and outputs

STP16CP596

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2.2

Timing diagram

Note:

Note: The latches circuit holds data when the LE terminal is Low.

When the LE terminal is at High level, latch circuit doesn’t hold the data it passes from the input

to the output.

When the OE terminal is at Low level, output terminals OUT0 to OUT15 respond to the data,

either ON or OFF.

When the OE terminal is at High level, it switches off all the data on the output terminal.

Figure 7.

Timing diagram - normal mode