STLVDS31

5/13

Note 2: RS-232 IN to TTL-CMOS OUT (from 50% to 50%)

Figure 1 : Voltage and Current Definitions

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Propagation Delay Time,

Low to High Output

Fig. 2

0.5

1.4

2

ns

Propagation Delay Time,

High to Low Output

1

1.7

2.5

ns

Differential Output Signal

Rise Time

0.4

0.5

0.6

ns

Differential Output Signal

Fall Time

0.4

0.5

0.6

ns

0.3

0.6

ns

Channel to Channel Output

Skew (note1)

0

0.3

ns

Propagation Delay Time,

High Impedance to High

Level Output

Fig. 4

5.4

15

ns

Propagation Delay Time,

High Impedance to Low

Level Output

2.5

15

ns

Propagation Delay Time,

High Level to High

Impedance Output

8.1

15

ns

Propagation Delay Time,

Low Level to High

Impedance Output

7.3

15

ns