Application information

ESDAxxSCx

4/11

2

Application information

2.1

Calculation of the clamping voltage use of the dynamic

resistance

The ESDA family has been designed to clamp fast spikes like ESD. Generally the PCB

designers need to calculate easily the clamping voltage V

dynamic resistance in addition to the classical parameters. The voltage across the

protection cell can be calculated with the following formula:

V

Where I

As the value of the dynamic resistance remains stable for a surge duration lower than 20 µs,

the 2.5 µs rectangular surge is well adapted. In addition both rise and fall times are

optimized to avoid any parasitic phenomenon during the measurement of R

2.2

Dynamic resistance measurement

The short duration of the ESD has led us to prefer a more adapted test wave, as below

defined, to the classical 8/20µs and 10/1000 µs surges.

Figure 9.

2.5 µs duration measurement wave

Figure 7.

Relative variation of leakage

current versus junction

temperature (typical values)

Figure 8.

Peak forward voltage drop versus

peak forward current

(typical values)

25

50

75

100

125

1

10

100

500

ESDA14V2SC5/SC6

&

ESDA6V1SC5/SC6

ESDA5V3SC5/SC6

ESDA25SC6

ESDA17SC6

&

ESDA19SC6

T (°C)

j

I [T ] / I [T =25°C]

Rj

Rj

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0.01

0.10

1.00

5.00

ESDA25SC6

ESDA17SC6

ESDA5V3SC5/SC6

ESDA14V2SC5/SC6

&

ESDA6V1SC5/SC6

ESDA19SC6

I

(A)

FM

V

(V)

FM

T = 25°C

j

2µs

tp = 2.5µs

t

I

Ipp