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May 2004

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HIGH SPEED:

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LOW POWER DISSIPATION:

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HIGH NOISE IMMUNITY:

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SYMMETRICAL OUTPUT IMPEDANCE:

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BALANCED PROPAGATION DELAYS:

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WIDE OPERATING VOLTAGE RANGE:

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PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 573

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SPACE GRADE-1: ESA SCC QUALIFIED

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50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

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NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

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DEVICE FULLY COMPLIANT WITH

SCC-9202-072

DESCRIPTION

The M54HC573 is an high speed CMOS OCTAL

LATCH WITH 3-STATE OUTPUTS fabricated

This 8-BIT D-Type latches is controlled by a latch

enable input (LE) and output enable input (OE).

While the LE input is held at a high level, the Q

outputs will follow the data input precisely. When

LE is taken low, the Q outputs will be latched

precisely at the logic level of D input data.

While the OE input is at low level, the eight outputs

will be in a normal logic state (high or low logic

level) and while is at high level the outputs will be

in a high impedance state.

The 3-State output configuration and the wide

choice of outline make bus organized system

simple.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

M54HC573

RAD-HARD OCTAL D-TYPE LATCH

WITH 3 STATE OUTPUT NON INVERTING

PIN CONNECTION

ORDER CODES

PACKAGE

FM

EM

DILC

M54HC573D

M54HC573D1

FPC

M54HC573K

M54HC573K1

DILC-20

FPC-20

Rev. 1