L6713ATR datasheet(29/64 Pages) STMICROELECTRONICS

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L6713A

Configuring the device

29/64

Output voltage is programmed through the VID pins: they are inputs of an internal DAC that

is realized by means of a series of resistors providing a partition of the internal voltage

reference. The VID code drives a multiplexer that selects a voltage on a precise point of the

divider. The DAC output is delivered to an amplifier obtaining the voltage reference (i.e. the

set-point of the error amplifier, VREF).

Note:

VID pull-ups / pull-downs, VID voltage thresholds and OUTEN thresholds changes

according to the selected DAC: See Table 5 for details.

Note:

VID pull-ups / pull-downs, VID voltage thresholds and OUTEN thresholds changes

according to the selected DAC: See Table 5 for details.

Table 13.

Intel mode configuration (See Note)

Function (1)

Typical connection

SS / LTBG /

AMD

It allows programming the soft-start time TSS

and also the LTB Technology™ gain. See “Soft-

start” Section and See “Load transient boost

technologyTM” Section for details.

RSSOSC resistor in series to

signal diode vs. SSEND pin.

(LTB™ gain = 2, default value).

VID_SEL

It allows selecting between VR11 DAC or

VR10.x + 6.25 mV extended DAC.

Static info, no dynamic changes allowed.

Open: VR11 (

Table 7 ).

short to SGND: VR10.x

(

Table 8 ).

VID7 to VID0

They allow programming the output voltage

according to Table 7 and Table 8.

Dynamic transitions managed, See “Dynamic

VID transitions” Section for details.

Open: Logic “1” (25

μA pull-up)

Short to SGND: “0”

SSEND /

PGOOD

Soft-start end signal set free after soft-start has

finished. It only indicates soft-start has finished.

Pull-up to anything lower

than 5 V.

Table 14.

AMD mode configuration (See Note)

Function

Typical connection

SS / LTBG /

AMD

It allows programming AMD 6 BIT DAC.

Short to SGND.

VID_SEL

Not applicable

Need to be shorted to SGND.

VID7 / DVID

Pulled high when performing a D-VID transition.

The pin is kept high with a 32 clock cycles delay.

Not applicable

VID6

Not applicable

Need to be shorted to SGND.

VID5 to VID0

They allow programming the output voltage

according to Table 10.

Dynamic transitions managed, See “Dynamic

VID transitions” Section for details.

Open: “0” (12.5

μA pull-down)

Pull-up to V > 1.4 V: “1”

SSEND /

PGOOD

Power good signal set free after soft-start has

finished whenever the output voltage is within

limits.

Pull-up to anything lower

than 5 V.

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