M40Z111 datasheet(5/21 Pages) STMICROELECTRONICS

5 / 21 page

M40Z111, M40Z111W

Description

5/21

Description

The M40Z111/W NVRAM supervisor is a self-contained device which converts a standard

low-power SRAM into a non-volatile memory.

A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance

condition.

When an invalid VCC condition occurs, the conditioned chip enable (ECON) output is forced

inactive to write-protect the stored data in the SRAM.

During a power failure, the SRAM is switched from the VCC pin to the lithium cell within the

SNAPHAT® to provide the energy required for data retention. On a subsequent power-up,

the SRAM remains write protected until a valid power condition returns.

The 28-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct

connection to a separate SNAPHAT housing containing the battery. The unique design

allows the SNAPHAT battery package to be mounted on top of the SOIC package after the

completion of the surface mount process.

Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the

high temperatures required for device surface-mounting. The SNAPHAT housing is keyed to

prevent reverse insertion.

The SOIC and battery packages are shipped separately in plastic anti-static tubes or in Tape

& Reel form. For the 28-lead SOIC, the battery package (e.g., SNAPHAT) part number is

“M4Z28-BR00SH1” or “M4Z32-BR00SH1” (See Table 11 on page 19).

Figure 1.

Logic diagram

AI02238B

THS

VCC

M40Z111

M40Z111W

ECON

VSS

VOUT

M40Z111 数据表(PDF) 5 Page - STMicroelectronics