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TS4974 数据表(PDF) 20 Page - STMicroelectronics |
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TS4974 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 25 page ![]() Application information TS4974 20/25 4.7 Pop performance Due to its fully differential structure, the pop performance of the TS4974 is close to perfect. However, due to mismatching between internal resistors Rin, Rfeed, and external input capacitors Cin, some noise might remain at startup. To eliminate the effect of mismatched components, the TS4974 includes pop reduction circuitry. With this circuitry, the TS4974 is close to zero pop for all possible common applications. In addition, when the TS4974 is in standby mode, due to the high impedance output stage in this configuration, no pop is heard. 4.8 Single-ended input configuration It is possible to use the TS4974 in a single-ended input configuration. The schematic in Figure 41 shows an example of this configuration. Figure 41. Typical single-ended input application 4.9 Volume setting The TS4974 features a digital volume control with an internal gain range of -33 dB up to +12 dB, by steps of 3 dB. When the device is powered up from VCC (and not from the standby pin), an initial gain of -12dB is internally fixed. When standby mode is activated, the gain value is memorized and held until standby is released. Cin1 330nF Cin2 330nF P1 Vin Cb 1µF VCC Cs 1µF STBY control Speaker 8 Ohms S1 Volume DOWN S2 Volume UP 470k Rpd1 470k Rpd1 470k Rpu1 470k Rpu2 VCC VCC DIGITAL VOLUME CONTROL BIAS STBY + 1 2 3 9 8 Vin- Vin+ BYP ASS STBY Vout- Vout+ U1 TS4974 DFN10 |
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