1/10

April 2004

s

HIGH SPEED:

s

LOW POWER DISSIPATION:

s

HIGH NOISE IMMUNITY:

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

BALANCED PROPAGATION DELAYS:

s

WIDE OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

54 SERIES 237

s

SPACE GRADE-1: ESA SCC QUALIFIED

s

50 krad QUALIFIED, 100 krad AVAILABLE ON

REQUEST

s

NO SEL UNDER HIGH LET HEAVY IONS

IRRADIATION

s

DEVICE FULLY COMPLIANT WITH

SCC-9205-021

DESCRIPTION

The M54HC237 is an high speed CMOS 3 TO 8

LINE DECODER fabricated with silicon gate

When GL goes from low to high, the address

present at the select inputs (A, B, C) is stored in

the latches. As long as GL remains high no

address changes will be recognized. Output

enable controls, G1 and G2 control the state of the

outputs

independently

of

the

select

or

latch-enable inputs. All of the outputs are low

unless G1 is high and G2 is low. The M54HC237

is

ideally

suited

for

the

implementation

of

glitch-free

decoders

in

stored-address

applications in bus oriented systems.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

M54HC237

RAD-HARD 3 TO 8 LINE DECODER LATCH

PIN CONNECTION

ORDER CODES

PACKAGE

FM

EM

DILC

M54HC237D

M54HC237D1

FPC

M54HC237K

M54HC237K1

DILC-16

FPC-16