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T620W 数据表(PDF) 4 Page - STMicroelectronics |
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T620W 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 5 page ![]() T820W / T830W 4/5 10 100 1000 0.01 0.10 1.00 10.00 tp(ms) Tj initial=25°C dI/dt limitation: 50A/µs ITSM I²t ITSM(A), I t (A s) 22 Fig. 6: Non repetitive surge peak on-state current for a sinusoidal pulse with width tp<10ms, and corresponding value of I 2t. 0 10 20 30 40 50 60 70 80 90 1 10 100 1000 Number of cycles Non repetitive Tj initial=25°C Repetitive Tc=105°C t=20ms ITSM(A) Fig. 5: Surge peak on-state current versus number of cycles. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Tj(°C) IGT IH & IL IGT, IH, IL[Tj] / IGT, IH, IL[Tj=25°C] Fig. 7: Relative variation of gate trigger current, holding current and latching current versus junc- tion temperature (typical values). 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.1 1.0 10.0 100.0 dV/dt (V/µs) (dI/dt)c [(dV/dt)c / Specified (dI/dt)c Fig. 8: Relative variation of critical rate of decrease of main current versus reapplied dV/dt (typical val- ues). 0 1 2 3 4 5 6 7 8 0 25 50 75 100 125 Tj(°C) (dI/dt)c [Tj] / (dI/dt)c [Tj=125°C] Fig. 9: Relative variation of critical rate of decrease of main current versus junction temperature. |
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