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STCN75 数据表(PDF) 23 Page - STMicroelectronics |
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STCN75 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 35 page ![]() STCN75 Functional description 23/35 3.6 WRITE mode In this mode the master transmitter transmits to the STCN75 slave receiver. Bus protocol is shown in Figure 11. Following the START condition and slave address, a logic '0' (R/W = 0) is placed on the bus and indicates to the addressed device that word address will follow and is to be written to the on-chip address pointer. These modes are shown in the WRITE mode typical timing diagrams (see Figure 11, and Figure 12, and Figure 13 on page 24). Figure 11. Typical pointer set followed by an immediate READ from the configuration register Figure 12. Configuration register WRITE AI12230 19 1 9 Repeat Start by Master ACK by STCN75 No ACK by STCN75 Stop Cond. by Master 1 0 0 1 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 R/W Address Byte Data Byte 11 99 1 Start by Master Address Byte Pointer Byte ACK by STCN75 ACK by STCN75 0 0 1 A2 A1 A0 R/W 0 0 0 0 0 0 D1 D0 AI12231 11 99 1 9 1 Start by Master Address Byte Pointer Byte ACK by STCN75 ACK by STCN75 ACK by STCN75 Stop Cond. by Master 00 1 A2 A1 A0 R/W 00 0 0 0 0 0 0 0 D4 D3 D2 D1 D0 D1 D0 Configuration Byte |
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