M74HC175

2/11

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

TRUTH TABLE

X : Don’t Care

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

PIN No

SYMBOL

NAME AND FUNCTION

1

CLEAR

Asynchronous Master

Reset (Active Low)

2, 7, 10, 15

1Q to 4Q

Flip-Flop Outputs

3, 6, 11, 14

1Q to 4Q

Complementary Flip-Flop

Outputs

4, 5, 12, 13

1D to 4D

Data Inputs

9

CLOCK

Clock Input (LOW to

HIGH, edge triggered)

8

GND

Ground (0V)

16

Vcc

Positive Supply Voltage

INPUTS

OUTPUTS

FUNCTION

CLEAR

D

CLOCK

Q

Q

LX

X

L

H

HL

LH

HH

H

L

H

X

Qn

Qn

NO CHANGE