 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ST7LITE1XB 数据表(PDF) 81 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7LITE1XB 数据表(HTML) 81 Page - STMicroelectronics |
|
|
81 / 159 page  ST7LITE1xB 81/159 LITE TIMER (Cont’d) 11.3.4 Low Power Modes 11.3.5 Interrupts Note: The TBxF and ICF interrupt events are con- nected to separate interrupt vectors (see Inter- rupts chapter). They generate an interrupt if the enable bit is set in the LTCSR1 or LTCSR2 register and the interrupt mask in the CC register is reset (RIM instruction). 11.3.6 Register Description LITE TIMER CONTROL/STATUS REGISTER 2 (LTCSR2) Read / Write Reset Value: 0000 0000 (00h) Bits 7:2 = Reserved, must be kept cleared. Bit 1 = TB2IE Timebase 2 Interrupt enable This bit is set and cleared by software. 0: Timebase (TB2) interrupt disabled 1: Timebase (TB2) interrupt enabled Bit 0 = TB2F Timebase 2 Interrupt Flag This bit is set by hardware and cleared by software reading the LTCSR register. Writing to this bit has no effect. 0: No Counter 2 overflow 1: A Counter 2 overflow has occurred LITE TIMER AUTORELOAD REGISTER (LTARR) Read / Write Reset Value: 0000 0000 (00h) Bits 7:0 = AR[7:0] Counter 2 Reload Value These bits register is read/write by software. The LTARR value is automatically loaded into Counter 2 (LTCNTR) when an overflow occurs. LITE TIMER COUNTER 2 (LTCNTR) Read only Reset Value: 0000 0000 (00h) Bits 7:0 = CNT[7:0] Counter 2 Reload Value This register is read by software. The LTARR val- ue is automatically loaded into Counter 2 (LTCN- TR) when an overflow occurs. LITE TIMER CONTROL/STATUS REGISTER (LTCSR1) Read / Write Reset Value: 0x00 0000 (x0h) Bit 7 = ICIE Interrupt Enable This bit is set and cleared by software. 0: Input Capture (IC) interrupt disabled 1: Input Capture (IC) interrupt enabled Mode Description SLOW No effect on Lite timer (this peripheral is driven directly by fOSC/32) WAIT No effect on Lite timer ACTIVE HALT No effect on Lite timer HALT Lite timer stops counting Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Active Halt Exit from Halt Timebase 1 Event TB1F TB1IE Yes Yes No Timebase 2 Event TB2F TB2IE No IC Event ICF ICIE No 70 00 00 00 TB2IE TB2F 70 AR7AR6 AR5AR4 AR3AR2 AR1 AR0 70 CNT7 CNT6 CNT5 CNT4 CNT3 CNT2 CNT1 CNT0 70 ICIE ICF TB TB1IE TB1F - - - 1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
