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STA680 数据表(PDF) 36 Page - STMicroelectronics

部件名 STA680
功能描述  HD Radio base-band receiver
PDF  43 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STA680 数据表(HTML) 36 Page - STMicroelectronics

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Digital I/O and memory interfaces
STA680
36/43
Table 19.
SDRAM interface timing values
Symbol
Parameter
Condition
Min.
Max.
Unit
Tck
SCL clock period
6.06
-
ns
Tch
CLK high level width
2.5
-
ns
Tcl
CLK low level width
2.5
-
ns
Tdh
Data hold time
2
-
ns
Tds
Data setup time
2
-
ns
Tac
Access time from clock
(posedge)
-5.4
ns
Toh
Data out hold time
1.8
-
ns
Tt
Transition time
-
1.2
ns



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