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STV7710WAF 数据表(PDF) 15 Page - STMicroelectronics |
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STV7710WAF 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 21 page ![]() STV7710 AC timing characteristics 15/21 8 AC timing characteristics VCC = 5 V, VPP = 70 V, VSSP = 0 V, VSSSUB = 0 V, Vsslog = 0 V, Tamb = 25°C, fCLK = 40 MHz (VILMAX = 0.2 Vcc, VIHMIN = 0.8 VCC) Table 12. AC timing characteristics Symbol Parameter Min Typ Max Unit tPHL1 tPLH1 Delay of power output change after CLK transition - high to low - low to high - - 35 30 100 100 ns ns tPHL2 tPLH2 Delay of power output change after STB transition - high to low - low to high - - - 95 95 ns ns tPHL3 tPLH3 Delay of power output change after BLK, POC transition - high to low - low to high - 25 20 90 90 ns ns tR OUT Power output rise time(1) 50 - 200 ns tF OUT Power output fall time(1) 50 - 200 ns tS Width of the falling edge smooth shape (not tested)(2) -30- ns tR DAT Logic data output rise time (CL = 10pF) - 9 20 ns tF DAT Logic data output fall time (CL = 10pF) - 5 12 ns tPHL4 tPLH4 Delay of logic data output change after CLK transition - high to low - low to high - - 12 13 25 25 ns ns 1. One output among 96, loading capacitor CL = 50pF, other outputs at low level 2. See Figure 7: Zoom for OUTn showing tS and tF OUT |
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