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STPC12HEYI 数据表(PDF) 45 Page - STMicroelectronics |
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STPC12HEYI 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 111 page  ELECTRICAL SPECIFICATIONS Issue 1.0 - July 24, 2002 45/111 Note 1: PCI clock at 33MHz WLC White Level Current 15.00 mA 18.50 mA Table 4-4. RAMDAC DC Specification Symbol Parameter Min Max Table 4-5. VGA RAMDAC Power Consumption DCLK (MHz) DAC mode (State) PMax (mW) VDD_DAC = 2.45V VDD_DAC = 2.7V - Shutdown 0 0 6.25 - 135 Active 150 180 Table 4-6. 2.5V Power Consumptions (VCORE + VDD_x_PLL + VDD_DAC) HCLK (MHz) CPUCLK (MHz) MCLK (MHz) Mode DCLK (MHz) PMU (State) PMax (W) V2.5V=2.45V V2.5V=2.7V 66 133 (x2) 66 SYNC Stopped Stop Clock 1.5 1.9 Full Speed 2.5 3.0 135 Stop Clock 2.1 2.6 Full Speed 2.1 3.6 66 133 (x2) 90 ASYNC Stopped Stop Clock 1.9 2.4 Full Speed 2.8 3.5 135 Stop Clock 2.5 3.1 Full Speed 3.3 4.1 Table 4-7. 3.3V Power Consumptions (VDD) HCLK (MHz) CPUCLK (MHz) MCLK (MHz) DCLK (MHz) PMU (State) PMax (mW) 66 133 (x2) 66 6.26 Full Speed 130 135 215 66 133 (x2) 90 6.26 Full Speed 150 135 240 Table 4-8. PLL Power Consumptions PLL name PMax (mW) VDD_PLL = 2.45V VDD_PLL = 2.7V VDD_DCLK_PLL 5 10 VDD_DEVCLK_PLL 5 10 VDD_HCLKI_PLL 5 10 VDD_HCLKO_PLL 5 10 VDD_MCLKI_PLL 5 10 VDD_MCLKO_PLL 5 10 VDD_PCICLK_PLL 5 10 |
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