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L6566A 数据表(PDF) 31 Page - STMicroelectronics |
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L6566A 数据表(HTML) 31 Page - STMicroelectronics |
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31 / 51 page ![]() L6566A Application information 31/51 Figure 18. Hiccup-mode OCP: timing diagram 5.8 PFC interface The device is specifically designed to minimize converter’s losses under light or no-load conditions, and a special function has been provided to help the designer meet energy saving requirements even in power-factor-corrected systems where a PFC pre-regulator precedes the isolated DC-DC converter. Actually EMC regulations require compliance with low-frequency harmonic emission limits at nominal load; no limit is envisaged when the converter operates with a light load. Then the PFC pre-regulator can be turned off, thus saving the no-load consumption of this stage (0.5 ÷1 W). To do so, the L6566A provides the Vcc_PFC pin (6): this pin is internally connected to the Vcc pin (5) via a PNP transistor, normally closed, that opens when the voltage VCOMP falls below VCOMPO, a threshold internally set at a value depending on whether QR operation or FF operation is selected. This pin is intended for supplying the PFC controller of the pre- regulator as shown in Figure 16 on page 28. The switch is thermally protected, so that the IC will stop if an external failure causes the pin to be overloaded for too long time or shorted to ground. Vcc (pin 5) GD (pin 4) OCP latch VccON VccOFF Vccrestart Secondary diode is shorted here t t t t VCS (pin 7) Vcc_OK t 1.5 V Vcc_PFC (pin 6) t |
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