HD151TS307ARP

Rev.4.00 Jul. 08, 2004 page 2 of 8

Pin Arrangement

(Top view)

8

VDD

1

7

SEL0

6

SSCCLKOUT

5

GND

XIN

2

XOUT

3

SEL1

4

NC

SSC Function Table

SEL1 :0

Spread Percentage

0 0

±0.5%

0 1

±1.5%

1 0

SSC OFF

1 1

±0.25%

Note:

±1.5% SSC is selected for default by internal pull-up & down resistors.

Clock Frequency Table

XIN(MHz)

SSCCLKOUT(MHz)

48

48

*1

24

24

*1

Notes: 1. With spread spectrum modulation.

Pin Descriptions

Pin name

No.

Type

Description

GND

5

Ground

GND pin

VDD

8

Power

Power supplies pin. Normally 3.3 V.

NC

4

NC

Don’t connect any signal or VDD or GND.

This pin is used for Renesas Test.

SSCCLKOUT

6

Output

Spread spectrum modulated clock output.

XIN

1

Input

Oscillator input.

XOUT

2

Output

Oscillator output.

SEL0

7

Input

SSC mode select pin. LVCMOS level input.

Pull-up by internal resistor (100 k

Ω).

SEL1

3

Input

SSC mode select pin. LVCMOS level input.

Pull–down by internal resistor (100 k

Ω).