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HD74LS293P 数据表(PDF) 1 Page - Renesas Technology Corp |
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HD74LS293P 数据表(HTML) 1 Page - Renesas Technology Corp |
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1 / 8 page ![]() Rev.3.00, Jul.15.2005, page 1 of 7 HD74LS293 4-bit Binary Counter REJ03D0477–0300 Rev.3.00 Jul.15.2005 This counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and divide- by-eight counter. This counter has a gated zero reset. To use the maximum count length of this counter, the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate function table. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS293P DILP-14 pin PRDP0014AB-B (DP-14AV) P — Pin Arrangement (Top view) GND 1 2 3 4 5 6 7 14 8 9 10 11 12 13 NC NC NC QC QD QB NC QB VCC R0(2) R0(1) R0(1) B B QA R0(2) A A QC QD QA Outputs Inputs Outputs Function Table Reset / Count Reset Input Outputs R0 (1) R0 (2) QD QC QB QA H H L L L L L X Count X L Count |
类似零件编号 - HD74LS293P |
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类似说明 - HD74LS293P |
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