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HD74LS74AP 数据表(PDF) 2 Page - Renesas Technology Corp

部件名 HD74LS74AP
功能描述  Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear)
PDF  8 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

HD74LS74AP 数据表(HTML) 2 Page - Renesas Technology Corp

  HD74LS74AP Datasheet HTML 1Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 2Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 3Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 4Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 5Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 6Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 7Page - Renesas Technology Corp HD74LS74AP Datasheet HTML 8Page - Renesas Technology Corp  
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HD74LS74A
Rev.3.00, Jul.22.2005, page 2 of 7
Function Table
Input
Output
Preset
Clear
Clock
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H*
H*
H
H
H
H
L
H
H
L
L
H
H
H
L
X
Q0
Q
0
H; high level, L; low level, X; irrelevant,
↑; transition from low to high level,
Q0; level of Q before the indicated steady-state input conditions were established.
Q
0; complement of Q0 or level of Q before the indicated steady-state input conditions were established.
*;This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive (high) level.
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
7
V
Input voltage
VIN
7
V
Power dissipation
PT
400
mW
Storage temperature
Tstg
–65 to +150
°C
Note:
Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Symbol
Min
Typ
Max
Unit
Supply voltage
VCC
4.75
5.00
5.25
V
IOH
–400
µA
Output current
IOL
8
mA
Operating temperature
Topr
–20
25
75
°C
Clock frequency
fclock
0
25
MHz
Clock High
tw
25
Pulse width
Clear Preset
tw
25
ns
“H” Data
tsu
20
Setup time
“L” Data
tsu
20
ns
Hold time
th
5
ns
Note:
↑; The arrow indicates the rising edge.



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