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4553 数据表(PDF) 29 Page - Renesas Technology Corp |
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4553 数据表(HTML) 29 Page - Renesas Technology Corp |
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29 / 145 page ![]() Rev.3.02 Dec 22, 2006 page 29 of 142 REJ03B0024-0302 4553 Group Count source • Instruction clock (INSTCK) • PWM output (PWMOUT) • Prescaler output (ORCLK) • Timer 3 underflow (T3UDF) • CNTR input • XIN input • Prescaler output (ORCLK) divided by 2 • XCIN input • ORCLK • Bit 4 of timer 3 • System clock (STCK) • Instruction clock (INSTCK) Structure 8-bit programmable binary down counter 8-bit programmable binary down counter (link to INT input) 8-bit programmable binary down counter (PWM output function) 16-bit fixed dividing frequency 4-bit programmable binary down counter 16-bit fixed dividing frequency Circuit Prescaler Timer 1 Timer 2 Timer 3 Timer LC Watchdog timer Use of output signal • Timer 1, 2, and 3 count sources • CNTR output control • Timer 1 interrupt • Timer 1 count source • CNTR output • Timer 2 interrupt • Timer 1 count source • Timer 3 interrupt • Timer LC count source • LCD clock • System reset (count twice) • WDF flag decision Frequency dividing ratio 1 to 256 1 to 256 1 to 256 8192 16384 32768 65536 1 to 16 65534 Control register PA W1 W2 W3 W4 Table 9 Function related timers |
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