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STV1601A 数据表(PDF) 4 Page - STMicroelectronics |
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STV1601A 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 17 page ![]() PIN DESCRIPTION (continued) Pin N Symbol Equivalent circuit Description I/O Standard Min. Typ. Max. Unit 30 PCX Parallel clock (PCX) and its return (PCY) For ECL mode, VCC =0 H L For TTL mode, VCC = +5V H L I -1.0 2.0 -1.6 0.8 V V V V 31 PCY 2, 5, 32 GND GND 26 VEE -5V power supply I/O buffer PLL -5.2 -5.0 -4.8 V 27 VEE -5V power supply Logic part -5.2 -5.0 -4.8 V 33 FV VCO free running frequency adjustment : VEE level gives the lowest frequency. To adjust, set TN1 high. I -3.9 V 34 TRP VCO input and phase comparator output should be connected to a parallel clock frequency trap filter to minimize jitter O -3.2 V 35 TN1 Test mode : High : VCO free running condition (input disabled) Low : Normal mode (input enabled) I -1.0 -4.5 V V EE V 2k Ω V R3 30 31 VCC 2k Ω 2k Ω GND 34 33 EE V 1k Ω 1k Ω 1k Ω 1k Ω 1k Ω 10kΩ 0.1 µF VCC 0.022 µF V9 2 µF 220 Ω 1 V CC GND EE V VR3 20k Ω 12k Ω 4k Ω STV1601A 4/17 |
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