t

BUF

t

LOW

t

HIGH

t

f

t

r

t

HD,STA

t

HD,DAT

t

SU,DAT

t

SU,STA

t

SU,STO

SDA

SCL

SDA

Figure 1 : I

I

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

SCL

Low Level Input Voltage

- 0.3

+ 1.5

V

High Level Input Voltage

3.0

V

Input Leakage Current

-10

+ 10

µA

Clock Frequency

0

100

kHz

Input Rise Time

1.5V to 3V

1000

ns

Input Fall Time

1.5V to 3V

300

ns

Input Capacitance

10

pF

SDA

Low Level Input Voltage

- 0.3

+ 1.5

V

High Level Input Voltage

3.0

V

Input Leakage Current

-10

+ 10

µA

Input Capacitance

10

pF

Input Rise Time

1.5V to 3V

1000

ns

Input Fall Time

1.5V to 3V

300

ns

Low Level Output Voltage

0.4

V

Output Fall Time

3V to 1.5V

250

ns

Load Capacitance

400

pF

TIMING

Clock Low Period

4.7

µs

Clock High Period

4.0

µs

Data Set-up Time

250

ns

Data Hold Time

0

340

ns

Set-up Time from Clock High to Stop

4.0

µs

Start Set-up Time following a Stop

4.7

µs

Start Hold Time

4.0

µs

Start Set-up Time following Clock Low-to High Transition

4.7

µs

STV6400

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