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M35053 数据表(PDF) 17 Page - Renesas Technology Corp |
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M35053 数据表(HTML) 17 Page - Renesas Technology Corp |
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17 / 40 page ![]() M35053-XXXSP/FP SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS MITSUBISHI MICROCOMPUTERS 16 Supplemental explanation about display control register (1) How to effect synchronous separation from composite video signals Synchronous separation is effected as follows depending on the width of L-level of the vertical synchronous period. 1. Less than 8.4µs ······ Not to be determined to be a vertical synchronous signal. 2. Equal to or higher than 8.4µs but less than 15.6µs ······ When two clocks continue, if take place, it is “L” period is determined to be a vertical synchronization signal. 3. Equal to or higher than 15.6µs ······ It is “L” period is determined to be a vertical synchronous signal with no condition. The determination is made at the timing indicated by V in Fig.3 either in case 2 or in case 3. Fig. 4 The method of synchronous separation from composite video signal. Fig. 5 Field definition V A horizontal scanning line number corresponds to slice lines DVP4 through DVP0 (address F116) and to encode lines EVP4 through EVP0 (address F216). stands for either an equalizing pulse or sequence of synchronizing pulse to be used as a trigger of a receiving set. H stands for a hori- zontal scanning period. (2) Field definition 8.4 µs 15.6 µs Vertical synchronous signal Composite video signal V 8.4 µs Equalizing pulse Sequence of synchronizing pulse First field Pulses during a vertical retrace line erasure period Second field 1/2H 1H 123 456 7 8 9 10 1/2H 1H 8–12H 1 ’ 2 ’ 3 ’ 4 ’ 5 ’ 6 ’ 7 ’ 8 ’ 9 ’ 10 ’ 11 V |
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