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M37274EFSP 数据表(PDF) 21 Page - Renesas Technology Corp |
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M37274EFSP 数据表(HTML) 21 Page - Renesas Technology Corp |
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21 / 148 page  20 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER M37274EFSP PRELIMINARY Notice: This is not a final specification. Some paramentic limits are subject to change. MITSUBISHI MICROCOMPUTERS Fig. 13. Interrupt Control Register 1 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register 1 (ICON1) [Address 00FE16] B Name Functions After reset RW Interrupt Control Register 1 0 Timer 1 interrupt enable bit (TM1E) 0 : Interrupt disabled 1 : Interrupt enabled 1 Timer 2 interrupt enable bit (TM2E) 2 Timer 3 interrupt enable bit (TM3E) 3 4 OSD interrupt enable bit (CRTE) 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 0 0 0 0 0 RW RW RW RW RW R— 7 Nothing is assigned. This bit is a write disable bit. When this bit is read out, the value is “0.” Timer 4 interrupt enable bit (TM4E) 0 : Interrupt disabled 1 : Interrupt enabled 5 VSYNC interrupt enable bit (VSCR) 0 : Interrupt disabled 1 : Interrupt enabled 0R W 6 A-D conversion • INT3 interrupt enable bit (ADE) 0 : Interrupt disabled 1 : Interrupt enabled 0R W Fig. 14. Interrupt Control Register 2 b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register 2 (ICON2) [Address 00FF16] B Name Functions After reset RW Interrupt Control Register 2 0 INT1 interrupt enable bit (INT1E) 0 : Interrupt disabled 1 : Interrupt enabled 1 Data slicer interrupt enable bit (DSR) 2 Serial I/O interrupt enable bit (SIOE) 3 4 INT2 interrupt enable bit (INT2E) 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 0 0 0 0 RW RW RW RW RW f(XIN)/4096 interrupt enable bit (1MSE) 0 : Interrupt disabled 1 : Interrupt enabled 5 Multi-master I2C-BUS interface interrupt enable bit (IICE) 0 : Interrupt disabled 1 : Interrupt enabled 0R W 6 Timer 5 • 6 interrupt enable bit (T56E) 0 : Interrupt disabled 1 : Interrupt enabled 0R W 7 Timer 5 • 6 interrupt switch bit (TM56S) 0 : Timer 5 1 : Timer 6 0R W |
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