M32C80 datasheet(86/352 Pages) RENESAS

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Page 67

8. Clock Generation Circuit

8.1.3 On-Chip Oscillator Clock

On-chip oscillator generates the on-chip oscillator clock. The 1-MHz on-chip oscillator clock becomes a

clock source of the CPU clock and peripheral function clock.

The on-chip oscillator clock stops after reset. When the CM21 bit in the CM2 register is set to "1" (on-chip

oscillator clock), the on-chip oscillator starts oscillating. Instead of the main clock, the on-chip oscillator

clock becomes clock source of the CPU clock and peripheral function clock.

Table 8.2 shows bit settings for on-chip oscillator start condition.

Table 8.2 Bit Settings for On-Chip Oscillator Start Condition

8.1.3.1 Oscillation Stop Detect Function

When the main clock is terminated by external source, the on-chip oscillator automatically starts oscil-

lating to generate another clock.

When the CM 20 bit in the CM2 registser is set to "1" (oscillation stop detect function enabled), an oscilla-

tion stop detection interrupt request is generated as soon as the main clock stops. Simultaneously, the on-

chip oscillator starts oscillating. Instead of the main clock, the on-chip oscillator clock becomes clock

source for the CPU clock and peripheral function clock. Associated bits are set as follows:

• The CM21 bit is set to "1" (on-chip oscillator clock becomes a clock source of the CPU clock.)

• The CM22 bit is set to "1" (main clock stop is detected.)

• The CM23 bit is set to "1" (main clock stops.) (See Figure 8.14)

8.1.3.2 How to Use Oscillation Stop Detect Function

• The oscillation stop detection interrupt shares vectors with the watchdog timer interrupt and the low

voltage detection interrupt. When these interrupts are used simultaneously, read the CM22 bit with

an interrupt routine to determine if an oscillation stop detection interrupt request has been generated.

• When the main clock resumes running after an oscillation stop is detected, set the main clock as

clock source of the CPU clock and peripheral function clock. Figure 8.11 shows the procedure to

switch the on-chip oscillator clock to the main clock.

• In low-speed mode, when the main clock is stopped by setting the CM20 bit to "1", the oscillation

stop detection interrupt request is generated. Simultaneously, the on-chip oscillator starts oscillat-

ing. The sub clock remains the CPU clock source. The on-chip oscillator clock becomes a clock

source for the peripheral function clock.

• When the peripheral function clock stops running, the oscillation stop detect function is also dis-

abled. To enter wait mode while the oscillation stop detect function is in use, set the CM02 bit in the

CM0 register to "0" (peripheral clock does not stop in wait mode).

• The oscillation stop detect function is provided to handle main clock stop caused by external source.

Set the CM20 bit to "0" (oscillation stop detect function disabled) when the main clock is terminated

by program, i.e., entering stop mode or setting the CM05 bit to "1" (main clock oscillation stop).

• When the main clock frequency is 2 MHz or less, the oscillation stop detect function is not available.

Set the CM20 bit to "0".

)

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