www.vishay.com

8

Document Number: 71763

S-71009–Rev. E, 14-May-07

Vishay Siliconix

DG417L/418L/419L

SCHEMATIC DIAGRAM (TYPICAL CHANNEL)

TEST CIRCUITS

Figure 1.

Level

Shift/

Drive

S

V+

GND

V-

D

V-

V+

Figure 2. Switching Time

Logic

Input

Switch

Output

50 %

0 V

90 %

Note:

Logic input waveform is inverted for switches that

have the opposite logic sense control

V+

IN

NO or NC

COM

V-

GND

35 pF

V-

300

Ω

V+

Switch

Input

Switch

Output

Figure 3. Break-Before-Make (DG419L)

NC

NO

0 V

Logic

Input

Switch

Output

90 %

IN

COM

V+

GND

V+

35 pF

300

Ω

V-

V-