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M16C/29 数据表(PDF) 39 Page - Renesas Technology Corp |
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M16C/29 数据表(HTML) 39 Page - Renesas Technology Corp |
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39 / 499 page ![]() 1. Overview page 15 p u o r G 9 2 / C 6 1 M 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Figure 1.9 Pin Assignment (Top View) of 64-Pin Package 32 31 30 29 28 26 25 24 23 22 21 20 19 18 17 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 27 64 P66/RxD1 P30/CLK3 P31/SIN3 P32/SOUT3 P33 P64/CTS1/RTS1/CTS0/CLKS1 P65/CLK1 P67/TxD1 P70/TxD2/SDA2/TA0OUT/RTS1/CTS1/CTS0/CLKS1 P71/RxD2/SCL2/TA0IN/CLK1 P76/TA3OUT P74/TA2OUT/W P75/TA2IN/W P72/CLK2/TA1OUT/V/RxD1 P73/CTS2/RTS2/TA1IN/V/TxD1 P00/AN00 P107/AN7/KI3 P104/AN4/KI0 P103/AN3 P102/AN2 P101/AN1 AVSS P100/AN0 VREF AVCC P93/AN24/CTX P92/AN32/TB2IN/CRX P02/AN02 P01/AN01 P106/AN6/KI2 P105/AN5/KI1 P77/TA3IN NOTES: 1.Set bits PACR2 to PACR0 in the PACR register to "0102" before signals are input or output to individual pins after reset. When the PACR register is not set, signals are not input or output for some M16C/29 Group (M16C/29) PLQP0064KB-A (64P6Q-A) (top view) |
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