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M16C/29 数据表(PDF) 122 Page - Renesas Technology Corp

部件名 M16C/29
功能描述  RENESAS MCU M16C FAMILY / M16C/Tiny SERIES
PDF  499 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M16C/29 数据表(HTML) 122 Page - Renesas Technology Corp

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11. DMAC
p
u
o
r
G
9
2
/
C
6
1
M
page 98
8
5
4
f
o
7
0
0
2
,
0
3
.r
a
M
2
1
.
1
.
v
e
R
2
1
1
0
-
1
0
1
0
B
9
0
J
E
R
Table 11.2 DMA Transfer Cycles
Table 11.3 Coefficient j, k
11.2. DMA Transfer Cycles
Any combination of even or odd transfer read and write adresses is possible. Table 11.2 shows the
number of DMA transfer cycles. Table 11.3 shows the Coefficient j, k.
The number of DMAC transfer cycles can be calculated as follows:
No. of transfer cycles per transfer unit = No. of read cycles x j + No. of write cycles x k
Transfer unit
Access address
No. of read cycles
No. of write cycles
8-bit transfers
Even
1
1
(DMBIT= 1)
Odd
1
1
16-bit transfers
Even
1
1
(DMBIT= 0)
Odd
2
2
Internal Area
Internal ROM, RAM
SFR
No wait With wait
1
1
2
2
2
2
j
k
3
3
1 wait
2 wait
(1)
(1)
NOTE:
1. Depends on the set value of PM20 bit in PM2 register



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