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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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M16C/29 数据表(PDF) 274 Page - Renesas Technology Corp |
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M16C/29 数据表(HTML) 274 Page - Renesas Technology Corp |
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274 / 499 page  15. A/D Converter p u o r G 9 2 / C 6 1 M page 250 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Figure 15.26 Each Flag Operation in ADSTAT0 Register Associated with the Operation Example in Delayed Trigger Mode 1 (2) •Example 3: When ADTRG input falling edge is generated more than two times after AN0 pin conversion AN0 AN1 AN2 AN3 (invalid) (valid after single sweep conversion) ADST flag ADERR0 flag ADERR1 flag ADTCSF flag ADSTT0 flag ADSTT1 flag ADSTRT0 flag ADSTRT1 flag IR bit in the ADIC register 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Set to 0 when interrupt request acknowledgement or a program Set to 0 by program Do not set to 1 by program A/D pin input voltage sampling A/D pin conversion ADST flag: Bit 6 in the ADCON0 register ADERR0, ADERR1, ADTCSF, ADSTT0, ADSTT1, ADSTRT0 and ADSTRT1 flag: bits 0, 1, 3, 4, 5, 6 and 7 in the ADSTAT0 register ADTRG pin input |
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