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M16C/29 数据表(PDF) 286 Page - Renesas Technology Corp |
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M16C/29 数据表(HTML) 286 Page - Renesas Technology Corp |
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286 / 499 page ![]() 16. MULTI-MASTER I2C bus INTERFACE p u o r G 9 2 / C 6 1 M page 262 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Figure 16.7 S4D0 Register SCPIN Reserved bit ICK4 ICK3 ICK2 TOSEL TOF TOE Function Bit Name Bit Symbol 0016 After Reset 02E716 Address Symbol S4D0 C0 Control Register 2 I2 RW b7 b6 b5 b4 b3 b2b1b0 0: Long time 1: Short time STOP condition detection interrupt request bit Set to 0 b5 b4 b3 0 0 0 VIIC set by ICK1 and ICK0 bits in S3D0 register 0 0 1 VIIC = 1/2.5 fIIC 0 1 0 VIIC = 1/3 fIIC 0 1 1 VIIC = 1/5 fIIC 1 0 0 VIIC = 1/6 fIIC Do not set other than the above values Time out detection time select bit Time out detection flag Time out detection function enable bit I2C bus system clock select bits 0: No I2C bus interface interrupt request 1: I2C bus interface interrupt request 0: Not detected 1: Detected 0: Disabled 1: Enabled RW RO RW RW RW RW RW RW (b6) (1) NOTE: 1. When the PCLK0 bit in the PCLKR register is set to 0, fIIC = f2. When the PCLK0 bit is set to 1, fIIC=f1. |
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