H8SLASH3008 datasheet(32/686 Pages) RENESAS

32 / 686 page

Rev.4.00 Aug. 20, 2007 Page xxxii of xliv

REJ09B0395-0400

Figure 8.31

Phase Difference, Overlap, and Pulse Width in Phase Counting Mode ............. 224

Figure 8.32

Timing for Setting 16-Bit Timer Output Level by Writing to TOLR................. 225

Figure 8.33

Timing of Setting of IMFA and IMFB by Compare Match ............................... 226

Figure 8.34

Timing of Setting of IMFA and IMFB by Input Capture ................................... 227

Figure 8.35

Timing of Setting of OVF .................................................................................. 228

Figure 8.36

Timing of Clearing of Status Flags .................................................................... 228

Figure 8.37

Contention between 16TCNT Write and Clear .................................................. 230

Figure 8.38

Contention between 16TCNT Word Write and Increment................................. 231

Figure 8.39

Contention between 16TCNT Byte Write and Increment .................................. 232

Figure 8.40

Contention between General Register Write and Compare Match..................... 233

Figure 8.41

Contention between 16TCNT Write and Overflow............................................ 234

Figure 8.42

Contention between General Register Read and Input Capture ......................... 235

Figure 8.43

Contention between Counter Clearing by Input Capture and Counter

Increment............................................................................................................ 236

Figure 8.44

Contention between General Register Write and Input Capture ........................ 237

Section 9 8-Bit Timers

Figure 9.1

Block Diagram of 8-Bit Timer Unit (Two Channels: Group 0) ......................... 245

Figure 9.2

8TCNT Access Operation (CPU Writes to 8TCNT, Word) ............................... 259

Figure 9.3

8TCNT Access Operation (CPU Reads 8TCNT, Word).................................... 259

Figure 9.4

8TCNT0 Access Operation (CPU Writes to 8TCNT0, Upper Byte).................. 259

Figure 9.5

8TCNT1 Access Operation (CPU Writes to 8TCNT1, Lower Byte) ................. 260

Figure 9.6

8TCNT0 Access Operation (CPU Reads 8TCNT0, Upper Byte)....................... 260

Figure 9.7

8TCNT1 Access Operation (CPU Reads 8TCNT1, Lower Byte) ...................... 260

Figure 9.8

Count Timing for Internal Clock Input............................................................... 261

Figure 9.9

Count Timing for External Clock Input (Both-Edge Detection) ........................ 262

Figure 9.10

Timing of Timer Output ..................................................................................... 262

Figure 9.11

Timing of Clear by Compare Match................................................................... 263

Figure 9.12

Timing of Clear by Input Capture ...................................................................... 263

Figure 9.13

Timing of Input Capture Input Signal ................................................................ 264

Figure 9.14

CMF Flag Setting Timing when Compare Match Occurs.................................. 264

Figure 9.15

CMFB Flag Setting Timing when Input Capture Occurs ................................... 265

Figure 9.16

Timing of OVF Setting....................................................................................... 265

Figure 9.17

Example of Pulse Output.................................................................................... 271

Figure 9.18

Contention between 8TCNT Write and Clear .................................................... 272

Figure 9.19

Contention between 8TCNT Write and Increment............................................. 273

Figure 9.20

Contention between TCOR Write and Compare Match..................................... 274

Figure 9.21

Contention between TCOR Read and Input Capture.......................................... 275

Figure 9.22

Contention between Counter Clearing by Input Capture and Counter

Increment............................................................................................................ 276

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