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38K2 数据表(PDF) 91 Page - Renesas Technology Corp |
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38K2 数据表(HTML) 91 Page - Renesas Technology Corp |
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91 / 358 page ![]() FUNCTIONAL DESCRIPTION Rev.2.00 Oct 15, 2006 page 72 of 130 38K2 Group REJ09B0338-0200 HARDWARE EXB Block Diagram The block diagram of external bus interface (EXB) is shown below. The external bus interface (EXB) consists of: (1) External I/O interface part (2) CPU interface part (3) Internal memory interface part (4) Transmit/Receive data buffer part External I/O interface CPU interface Index register External I/O configuration register EXB interrupt source enable register Cch_WR External MCU bus Cch_RD P34/ExCS CPU channel TxB_RDY controller RxB_RDY P37/ExA0 P36/ExRD Memory channel control Memory channel operation mode register Memory channel transmit buffer control Transmit buffer register Receive buffer register Memory channel controller End address register Memory address counter Memory channel status P35/ExWR Mch_RD Mch_WR Mch_TC P41/ExDACK/TxD mRX_enb P42/ExTC/SCLK mTX_enb P43/ExA1/SRDY Memory address Request acknowledge Memory read data Memory write data P33/ExINT Mch_req P40/ExDREQ/RxD FIFO_stt MRDsel stt_sel Buf_WR Transmit/Receive data buffer ExOE P10/DQ0/AN0– P17/DQ7/AN7 Decoder data selector Configuration signal Internal memory interface : Functions as normal ports just after reset. Fig. 106 Block diagram of external bus interface (EXB) |
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