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H8S/2240 数据表(PDF) 546 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 546 Page - Renesas Technology Corp |
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546 / 818 page ![]() Section 14 A/D Converter Rev.3.00 Mar. 26, 2007 Page 504 of 772 REJ09B0355-0300 14.1.2 Block Diagram Figure 14.1 shows a block diagram of the A/D converter. Module data bus Control circuit Internal data bus 10-bit D/A Comparator + – Sample-and- hold circuit φ/8 φ/16 ADI interrupt A D C S R A D C R A D D R D A D D R C A D D R B A D D R A AVCC Vref AVSS AN0 AN1 AN2 AN3 ADTRG Conversion start trigger from 8-bit timer or TPU ADCR ADCSR ADDRA ADDRB ADDRC ADDRD Legend: : A/D control register : A/D control/status register : A/D data register A : A/D data register B : A/D data register C : A/D data register D Figure 14.1 Block Diagram of A/D Converter |
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