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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S/2240 数据表(PDF) 560 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 560 Page - Renesas Technology Corp |
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560 / 818 page  Section 14 A/D Converter Rev.3.00 Mar. 26, 2007 Page 518 of 772 REJ09B0355-0300 Table 14.4 A/D Conversion Time (Single Mode) CKS = 0 CKS = 1 Item Symbol Min Typ Max Min Typ Max A/D conversion start delay t D 10 — 17 6 — 9 Input sampling time t SPL — 63 —— 31 — A/D conversion time t CONV 259 — 266 131 — 134 Note: Values in the table are the number of states. 14.4.4 External Trigger Input Timing A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to 11 in ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan modes, are the same as if the ADST bit has been set to 1 by software. Figure 14.6 shows the timing. φ ADTRG Internal trigger signal ADST A/D conversion Figure 14.6 External Trigger Input Timing |
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