H8SSLASH2240 datasheet(179/818 Pages) RENESAS

179 / 818 page

Section 6 Bus Controller

Rev.3.00 Mar. 26, 2007 Page 137 of 772

REJ09B0355-0300

6.2.3

Wait Control Registers H and L (WCRH, WCRL)

WCRH and WCRL are 8-bit readable/writable registers that select the number of program wait

states for each area.

In normal mode, only part of area is 0 is enabled, and bits W01 and W00 select the number of

program wait states for the external space. The settings of bits W71, W70 to W11, and W10 have

no effect on operation.

Program waits are not inserted in the case of on-chip memory or internal I/O registers.

WCRH and WCRL are initialized to H'FF by a power-on reset and in hardware standby mode.

They are not initialized by a manual reset or in software standby mode.

(1) WCRH

W71

R/W

W70

R/W

W61

R/W

W60

R/W

W51

R/W

W40

R/W

W50

R/W

W41

R/W

Bit

Initial value

R/W

Bits 7 and 6—Area 7 Wait Control 1 and 0 (W71, W70): These bits select the number of

program wait states when area 7 in external space is accessed while the AST7 bit in ASTCR is set

to 1.

Bit 7

Bit 6

W71

W70

Description

Program wait not inserted when external space area 7 is accessed

1 program wait state inserted when external space area 7 is accessed

2 program wait states inserted when external space area 7 is accessed

3 program wait states inserted when external space area 7 is accessed

(Initial value)

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