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H8S/2240 数据表(PDF) 280 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 280 Page - Renesas Technology Corp |
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280 / 818 page  Section 8 I/O Ports Rev.3.00 Mar. 26, 2007 Page 238 of 772 REJ09B0355-0300 Port 5 Register (PORT5) 7 — Undefined — 6 — Undefined — 5 — Undefined — 4 — Undefined — 3 P53 —* R 0 P50 —* R 2 P52 —* R 1 P51 —* R Bit Initial value R/W : : : Note: * Determined by state of pins P53 to P50. PORT5 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port 5 pins (P5 3 to P50) must always be performed on P5DR. Bits 7 to 4 are reserved; they return an undetermined value if read, and cannot be modified. If a port 5 read is performed while P5DDR bits are set to 1, the P5DR values are read. If a port 5 read is performed while P5DDR bits are cleared to 0, the pin states are read. After a power-on reset and in hardware standby mode, PORT5 contents are determined by the pin states, as P5DDR and P5DR are initialized. PORT5 retains its prior state after a manual reset, and in software standby mode. |
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