H8SXSLASH1663 datasheet(658/1158 Pages) RENESAS

658 / 1158 page

Section 12 8-Bit Timers (TMR)

Rev.1.00 Jun. 07, 2006 Page 606 of 1102

REJ09B0294-0100

CMIA0

CMIA1

CMIB0

CMIB1

OVI0

OVI1

TMO0

TMO1

TMCI0

TMCI1

TMRI0

TMRI1

TCORA_1:

TCNT_1:

TCORB_1:

TCSR_1:

TCR_1:

TCCR_1:

TCORA_0:

TCNT_0:

TCORB_0:

TCSR_0:

TCR_0:

TCCR_0:

φ/2

φ/8

φ/32

φ/64

φ/1024

φ/8192

Counter clock 1

Counter clock 0

Compare match A1

Compare match A0

Overflow 1

Overflow 0

Counter clear 0

Counter clear 1

Compare match B1

Compare match B0

Comparator A_0

Comparator A_1

TCORA_0

TCORB_0

TCSR_0

TCCR_0

TCORA_1

TCNT_1

TCORB_1

TCSR_1

TCCR_1

TCR_0

TCR_1

TCNT_0

Comparator B_0

Comparator B_1

A/D

conversion

start request

signal

Time constant register A_1

Timer counter_1

Time constant register B_1

Timer control/status register_1

Timer control register_1

Timer counter control register_1

Time constant register A_0

Timer counter_0

Time constant register B_0

Timer control/status register_0

Timer control register_0

Timer counter control register_0

Interrupt signals

Internal clocks

Clock select

Control logic

External clocks

[Legend]

Channel 1

(TMR_1)

Channel 0

(TMR_0)

Figure 12.1 Block Diagram of 8-Bit Timer Module (Unit 0)

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