H8SXSLASH1663 datasheet(749/1158 Pages) RENESAS

749 / 1158 page

Section 15 Serial Communication Interface (SCI, IrDA, CRC)

Rev.1.00 Jun. 07, 2006 Page 697 of 1102

REJ09B0294-0100

15.3.12

IrDA Control Register (IrCR)

IrCR selects the function of SCI_5.

IrE

R/W

IrCKS2

R/W

IrCKS1

R/W

IrCKS0

R/W

Bit

Bit Name

Initial Value

R/W

IrTxINV

R/W

IrRxINV

R/W



Bit

Bit Name

Initial

Value

R/W

Description

IrE

R/W

IrDA Enable

Sets the SCI_5 I/O to normal SCI or IrDA.

0: TxD5/IrTxD and RxD5/IrRxD pins operate as

TxD5 and RxD5.

1: TxD5/IrTxD and RxD5/IrRxD pins are operate as

IrTxD and IrRxD.

IrCK2

IrCK1

IrCK0

R/W

IrDA Clock Select 2 to 0

Sets the pulse width of high state at encoding the IrTxD

output pulse when the IrDA function is enabled.

000: Pulse-width = B

× 3/16 (Bit rate × 3/16)

001: Pulse-width = P

φ/2

010: Pulse-width = P

φ/4

011: Pulse-width = P

φ/8

100: Pulse-width = P

φ/16

101: Pulse-width = P

φ/32

110: Pulse-width = P

φ/64

111: Pulse-width = P

φ/128

IrTxINV

R/W

IrTx Data Invert

This bit specifies the inversion of the logic level in IrTxD

output. When inversion is done, the pulse width of high

state specified by the bits 6 to 4 becomes the pulse

width in low state.

0: Outputs the transmission data as it is as IrTxD output

1: Outputs the inverted transmission data as IrTxD

output

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