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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8SX/1663 数据表(PDF) 795 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 795 Page - Renesas Technology Corp |
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795 / 1158 page  Section 15 Serial Communication Interface (SCI, IrDA, CRC) Rev.1.00 Jun. 07, 2006 Page 743 of 1102 REJ09B0294-0100 TE bit SCK output pin TxD output pin Port input/output Port input/output Port input/output High output* Marking output Transmission start Transmission end Transition to software standby mode Software standby mode canceled SCI TxD output Port Port SCI TxD output Last TxD bit retained Note: * Initialized in software standby mode Figure 15.41 Port Pin States during Software Standby Mode Transition (Internal Clock, Clocked Synchronous Transmission) (Setting is Prohibited in SCI_5 and SCI_6) Start reception Reception [1] No No Yes Yes Read receive data in RDR Read RDRF flag in SSR Make transition to software standby mode Cancel software standby mode RE = 0 Initialization RE = 1 [2] Change operating mode? RDRF = 1 [1] Data being received will be invalid. [2] Setting of the module stop state is included. Figure 15.42 Sample Flowchart for Software Standby Mode Transition during Reception |
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