H8SXSLASH1663 datasheet(836/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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836 / 1158 page

Section 16 USB Function Module (USB)

Rev.1.00 Jun. 07, 2006 Page 784 of 1102

REJ09B0294-0100

16.3.27

Transceiver Test Register 1 (TRNTREG1)

TRNTREG1 is a test register that can monitor the on-chip transceiver input signal.

Setting bits PTSTE and txenl in TRNTREG0 to 1 enables monitoring the on-chip transceiver input

signal. Table 16.5 shows the relationship between pin input and TRNTREG1 monitoring value.

Bit

Bit Name

Initial Value

R/W



xver_data

*

dpls

*

dmns

*

Bit

Bit Name

Initial

Value

R/W

Description

7 to 3



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

xver_data

dpls

dmns

*

On-Chip Transceiver Input Signal Monitor

xver_data: Monitors the differential input level

(xver_data) signal of the on-chip

transceiver.

dpls:

Monitors the USD+ (dpls) signal of the on-

chip transceiver.

dmns:

Monitors the USD- (dmns) signal of the on-

chip transceiver.

Note:

Determined by the state of pins, VBUS, USD+, and USD-

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