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H8SX/1663 数据表(PDF) 849 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 849 Page - Renesas Technology Corp

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Section 16 USB Function Module (USB)
Rev.1.00 Jun. 07, 2006 Page 797 of 1102
REJ09B0294-0100
(2) Data Stage (Control-In)
USB function
Application
IN token reception
Data transmission to host
Set EP0i transmission
complete flag
(IFR0.EP0i TS = 1)
From setup stage
Write data to EP0i
data register (EPDR0i)
Write 1 to EP0i packet
enable bit
(TRG.EP0i PKTE = 1)
Clear EP0i transmission
complete flag
(IFR0.EP0i TS = 0)
Write 1 to EP0i packet
enable bit
(TRG.EP0i PKTE = 1)
Write data to EP0i
data register (EPDR0i)
1 written
to TRG.EP0s
RDFN?
Valid data
in EP0i FIFO?
NACK
NACK
No
No
Yes
Yes
ACK
Interrupt
request
Figure 16.11 Data Stage (Control-In) Operation
The application first analyzes command data from the host in the setup stage, and determines the
subsequent data stage direction. If the result of command data analysis is that the data stage is in-
transfer, one packet of data to be sent to the host is written to the FIFO. If there is more data to be
sent, this data is written to the FIFO after the data written first has been sent to the host (EP0iTS
bit in IFR0 = 1).
The end of the data stage is identified when the host transmits an OUT token and the status stage
is entered.
Note:
If the size of the data transmitted by the function is smaller than the data size requested by
the host, the function indicates the end of the data stage by returning to the host a packet
shorter than the maximum packet size. If the size of the data transmitted by the function is
an integral multiple of the maximum packet size, the function indicates the end of the data
stage by transmitting a zero-length packet.



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