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H8SX/1663 数据表(PDF) 923 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 923 Page - Renesas Technology Corp

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Section 19 D/A Converter
Rev.1.00 Jun. 07, 2006 Page 871 of 1102
REJ09B0294-0100
19.4
Operation
The D/A converter includes D/A conversion circuits for two channels, each of which can operate
independently. When the DAOE bit in DACR01 is set to 1, D/A conversion is enabled and the
conversion result is output.
An operation example of D/A conversion on channel 0 is shown below. Figure 19.2 shows the
timing of this operation.
1. Write the conversion data to DADR0.
2. Set the DAOE0 bit in DACR01 to 1 to start D/A conversion. The conversion result is output
from the analog output pin DA0 after the conversion time t
DCONV has elapsed. The conversion
result continues to be output until DADR0 is written to again or the DAOE0 bit is cleared to 0.
The output value is expressed by the following formula:
Contents of DADR/256
× V
ref
3. If DADR0 is written to again, the conversion is immediately started. The conversion result is
output after the conversion time t
DCONV has elapsed.
4. If the DAOE0 bit is cleared to 0, analog output is disabled.
Conversion data 1
Conversion
result 1
High-impedance state
tDCONV
DADR0
write cycle
DA0
DAOE0
DADR0
Address
P
φ
DACR01
write cycle
Conversion data 2
Conversion
result 2
tDCONV
[Legend]
tDCONV: D/A conversion time
DADR0
write cycle
DACR01
write cycle
Figure 19.2 Example of D/A Converter Operation



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