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ISO15 数据表(PDF) 15 Page - Renesas Technology Corp |
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ISO15 数据表(HTML) 15 Page - Renesas Technology Corp |
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15 / 20 page ![]() APPLICATION INFORMATION Transient Voltages ISO GND2 N ISO IN Z V = V Z Z + (1) x 9 GND2 ISO 9 4 N ISO IN V R 10 = = V R R 10 6 10 + + (2) ISO ISO ISO IN IN 1 C GND2 C 1 1 1 N C C 16 C V 1 1 = = = = 0.94 V 1 1 + + + (3) VN CIN RISO RIN A,B, Y,orZ SystemGround (GND1) BusReturn (GND2) 16V CISO ISO15 ISO35 www.ti.com................................................................................................................................................................ SLOS580B – MAY 2008 – REVISED JULY 2008 Isolation of a circuit insulates it from other circuits and earth so that noise develops across the insulation rather than circuit components. The most common noise threat to data-line circuits is voltage surges or electrical fast transients that occur after installation. The transient ratings of the ISO15 and ISO35 are sufficient for all but the most severe installations. However, some equipment manufacturers use their ESD generators to test transient susceptibility of their equipment, and can exceed insulation ratings. ESD generators simulate static discharges that may occur during device or equipment handling with low-energy but high voltage transients. Figure 21 models the ISO15 and ISO35 bus IO connected to a noise generator. CIN and RIN is capacitance or resistance across the device and any other stray or added capacitance or resistance across the A or B pin to GND2. CISO and RISO is the capacitance and resistance between GND1 and GND2 of the ISO15 and ISO35 plus those of any other insulation (transformer, etc.). The stray inductance is assumed to be negligible. From this model, the voltage at the isolated bus return is, and will always be less than 16 V from VN. If the ISO15 and ISO35 are tested as a stand-alone device, RIN = 6 נ 104 Ω, CIN = 16 נ 10–12 F, RISO = 10 9Ω and C ISO = 10 –12 F. Note from Figure 21 that the resistor ratio determines the voltage ratio at low frequency and it is the inverse capacitance ratio at high frequency. In the stand-alone case and for low frequency, or essentially all of noise appears across the barrier. At high frequency, and 94% of VN appears across the barrier. As long as RISO is greater than RIN and CISO is less than CIN, most of transient noise appears across the isolation barrier. It is not recommend for the user to test equipment transient susceptibility with ESD generators, or consider product claims of ESD ratings above the barrier transient ratings of an isolated interface. ESD is best managed through recessing or covering connector pins in a conductive connector shell and installer training. Figure 21. Noise Model Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link(s): ISO15 ISO35 |
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