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H8SX/1663R 数据表(PDF) 659 Page - Renesas Technology Corp |
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H8SX/1663R 数据表(HTML) 659 Page - Renesas Technology Corp |
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659 / 1504 page ![]() Section 13 I/O Ports Rev. 2.00 Sep. 24, 2008 Page 627 of 1468 REJ09B0412-0200 (4) PA4/ LHWR/LUB The pin function is switched as shown below according to the combination of operating mode and the EXPE bit, the bus controller register, the port function control register (PFCR), and the PA4DDR bit settings. Setting Bus Controller I/O Port Module Name Pin Function LUB_OE*2 LHWR_OE*2 PA4DDR LUB output*1 1 Bus controller LHWR output*1 (initial value E) 1 PA4 output 0 0 1 I/O port PA4 input (initial value S) 0 0 0 [Legend] Initial value E: Initial value in external extended mode Initial value S: Initial value in single-chip mode Notes: 1. Valid in external extended mode (EXPE = 1) 2. When the byte control SRAM space is accessed while the byte control SRAM space is specified or while LHWROE = 1, this pin functions as the LUB output; otherwise, the LHWR output. |
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