H8SXSLASH1663R datasheet(1278/1504 Pages) RENESAS

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Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1246 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

Value

R/W

Module

MSTPC7

MSTPC6

R/W

With 56 Kbytes of on-chip RAM:

On-chip RAM 6 (H'FEE000 to H'FEFFFF)

With 40 Kbytes of on-chip RAM:

Reserved

Always set the MSTPC7 and MSTPC6 bits to the same value.

MSTPC5

MSTPC4

R/W

With 56 Kbytes of on-chip RAM:

On-chip RAM 5, 4 (H'FF0000 to H'FF3FFF)

With 40 Kbytes of on-chip RAM:

On-chip RAM 4 (H'FF2000 to H'FF3FFF)

Always set the MSTPC5 and MSTPC4 bits to the same value.

MSTPC3

MSTPC2

R/W

On-chip RAM_3, 2 (H'FF4000 to H'FF7FFF)

Always set the MSTPC3 and MSTPC2 bits to the same value.

MSTPC1

MSTPC0

R/W

On-chip RAM_1, 0 (H'FF8000 to H'FFBFFF)

Always set the MSTPC1 and MSTPC0 bits to the same

value.

28.2.4

Deep Standby Control Register (DPSBYCR)

DPSBYCR controls deep software standby mode.

DPSBYCR is not initialized by the internal reset signal upon exit from deep software standby

mode.

Bit

Bit name

Initial value:

R/W:

DPSBY

R/W

IOKEEP

R/W

RAMCUT2

R/W

RAMCUT1

R/W



R/W



R/W



R/W

RAMCUT0

R/W

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