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H8SX/1663M 数据表(PDF) 676 Page - Renesas Technology Corp |
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H8SX/1663M 数据表(HTML) 676 Page - Renesas Technology Corp |
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676 / 1504 page ![]() Section 13 I/O Ports Rev. 2.00 Sep. 24, 2008 Page 644 of 1468 REJ09B0412-0200 (3) PJ5/TIOCA7/TIOCB7/TCLKG/PO21 The pin function is switched as shown below according to the combination of register setting of PPG and TPU, setting of the port function control register (PFCR), and the PJ5DDR bit settings. Setting PPG TPU I/O Port Module Name Pin Function PO21_OE TIOCB7_OE PJ5DDR PPG PO21 output* 1 TPU TIOCB7 output* 0 1 PJ5 output* 0 0 1 I/O port PJ5 input* 0 0 0 Note: * Valid when PCJKE = 1. (4) PJ4/TIOCA7/PO20 The pin function is switched as shown below according to the combination of register setting of PPG and TPU, setting of the port function control register (PFCR), and the PJ4DDR bit settings. Setting PPG TPU I/O Port Module Name Pin Function PO20_OE TIOCA7_OE PJ4DDR PPG PO20 output* 1 TPU TIOCA7 output* 0 1 PJ4 output* 0 0 1 I/O port PJ4 input* 0 0 0 Note: * Valid when PCJKE = 1. |
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