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H8SX/1663M 数据表(PDF) 833 Page - Renesas Technology Corp

部件名 H8SX/1663M
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663M 数据表(HTML) 833 Page - Renesas Technology Corp

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Section 15 Programmable Pulse Generator (PPG)
Rev. 2.00 Sep. 24, 2008 Page 801 of 1468
REJ09B0412-0200
15.4.4
Non-Overlapping Pulse Output
During non-overlapping operation, transfer from NDR to PODR is performed as follows:
• At compare match A, the NDR bits are always transferred to PODR.
• At compare match B, the NDR bits are transferred only if their value is 0. The NDR bits are
not transferred if their value is 1.
Figure 15.8 illustrates the non-overlapping pulse output operation.
Compare match A
Compare match B
Pulse
output
pin
Internal data bus
Normal output/inverted output
C
PODR
QD
NDER
Q
NDR
QD
Figure 15.8 Non-Overlapping Pulse Output
Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A.
The NDR contents should not be altered during the interval from compare match B to compare
match A (the non-overlapping margin).
This can be accomplished by having the TGIA interrupt handling routine write the next data in
NDR, or by having the TGIA interrupt activate the DTC or DMAC. Note, however, that the next
data must be written before the next compare match B occurs.



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